DSPIC33FJ256GP710A-I/PF Microchip DSC, 256kB Flash, 30kB RAM, TQFP-100

Microchip provides solutions for the entire performance range of 8-bit, 16-bit, and 32-bit microcontrollers, with a powerful architecture, flexible memory technologies, comprehensive easy-to-use development tools, complete technical documentation and post design-in support through a global sales and distribution network. Features: Operating Range:  DC – 40 MIPS (40 MIPS 3.0-3.6 V, -40°C to +85°C).  DC – 40 MIPS (40 MIPS 3.0-3.6 V, -40°C to +125°C).  Industrial temperature range (-40°C to +85°C).  Extended temperature range (-40°C to +125°C).  DC – 40 MIPS (40 MIPS 3.0-3.6 V, -40°C to +85°C).  DC – 40 MIPS (40 MIPS 3.0-3.6 V, -40°C to +125°C).  Industrial temperature range (-40°C to +85°C).  Extended temperature range (-40°C to +125°C). High-Performance DSC CPU:  Modified Harvard architecture.  C compiler optimized instruction set.  16-bit wide data path.  24-bit wide instructions.  Linear program memory addressing up to 4M instruction words.  Linear data memory addressing up to 64 Kbytes.  83 base instructions: mostly 1 word/1 cycle.  Sixteen 16-bit General Purpose Registers.  Two 40-bit accumulators:  With rounding and saturation options.  Flexible and powerful addressing modes:  Indirect, Modulo and Bit-Reversed.  Software stack.  16 x 16 fractional/integer multiply operations.  32/16 and 16/16 divide operations.  Single-cycle multiply and accumulate:  Accumulator write back for DSP operations.  Dual data fetch.  Up to ±16-bit shifts for up to 40-bit data.  Modified Harvard architecture.  C compiler optimized instruction set.  16-bit wide data path.  24-bit wide instructions.  Linear program memory addressing up to 4M instruction words.  Linear data memory addressing up to 64 Kbytes.  83 base instructions: mostly 1 word/1 cycle.  Sixteen 16-bit General Purpose Registers.  Two 40-bit accumulators:  With rounding and saturation options.  With rounding and saturation options.  Flexible and powerful addressing modes:  Indirect, Modulo and Bit-Reversed.  Indirect, Modulo and Bit-Reversed.  Software stack.  16 x 16 fractional/integer multiply operations.  32/16 and 16/16 divide operations.  Single-cycle multiply and accumulate:  Accumulator write back for DSP operations.  Dual data fetch.  Accumulator write back for DSP operations.  Dual data fetch.  Up to ±16-bit shifts for up to 40-bit data.